Govno Core 24 CPU consists of 6 general purpose (AX,BX,CX,DX,SI,GI) and 4 special purpose (SP,BP,PS,PC) registers. Although, SP (stack pointer) and BP (base pointer) are addressable in the register cluster.
Register cluster is a structure that consists of 2 register addresses in 1 byte. the first one is stored in bits [5..3], and the second one is stored in [2..0]. An example of a register cluster would be $33. To understand its meaning, we need to convert it to binary and slice it as 2/3/3. $33 would be converted to 00 110 011. Now, we need to convert register addresses to their names and remove the first 2 bits: we get %sp, %dx. That is our register addresses than we can use, for example, in add/rc or mov/rc instructions.
Register address to name conversion is done via this table:
RegAddr | RegName |
---|---|
000 | AX |
001 | BX |
010 | CX |
011 | DX |
100 | SI |
101 | GI |
110 | SP |
111 | BP |
The general purpose registers, SP, BP and PC are 24-bit wide (therefore CPU's name). PS (processor status, commonly known as FLAGS register) is 8-bit wide.
The $SP register -- Stack pointer, in Govno Core 24 points to the highest stack value - 1. When pushed to the stack, it is decremented, and when popping, it's incremented. It is a 24-bit addressable special purpose register.
The $PC -- Program counter, is a register in Govno Core 24 points to the current instruction's opcode that is being executed. It is a 24-bit nonaddressable special purpose register.
Govno Core 24 has a 24-bit address bus (therefore its name). That means, it can address up to 16 MiB of memory. The memory layout is as follows:
Addresses | Purpose |
---|---|
$000000-$00FFFF | General purpose memory |
$030000-$03FFFF | Boot sector (boot bank) |
$700000-$7FFFFF | BIOS static binary |
$FE0000-$FEFFFF | Stack |
$FF0000-$FF017F | Interrupt tables |
Govno Core 24 has a stack that is located at addresses $FE0000-$FEFFFF. It is one bank long (64 KiB long).
Govno Core 24 has 3 basic types:
The maximum variable length is 24 bits, although you can make multi-hword addition/subtraction with adc and sbb. (Nope, they don't exist yet).
Govno Core 24 instruction consists of a 1-byte opcode, and 0-2 operands. An operand can be a Register Cluster, a 24-bit immediate, or